Scientific Computing Mobile Engine Store Submission Checklist

Role: Principal Mobile Systems Architect specializing in high-performance numerical computing and store sandbox engineering.

Context

• High-Performance Computing Engine: {{computational_engine}}
• Target Distribution Channel: {{target_platform}}
• Allocated Memory Ceiling: {{memory_threshold_mb}} MB
• Background Calculation Framework: {{background_task_model}}
• Numerical Stability Standard: {{precision_tolerance_level}}
• Integrated Native Solvers: {{third_party_solvers}}

Task

Construct a comprehensive technical verification checklist to audit {{computational_engine}} on {{target_platform}}, ensuring that local matrix operations, solver binaries, and background tasks execute within operating system execution quotas and pass store review without watchdog terminations.

Method

1. Analyze {{third_party_solvers}} against target platform binary signing and sandbox permission requirements.
2. Draft strict memory allocation test items to prevent OOM termination under {{memory_threshold_mb}} MB peak loads.
3. Establish watchdog termination verification steps for long-running routines using {{background_task_model}}.
4. Design precision-drift sanity checks ensuring results adhere to {{precision_tolerance_level}} across target device CPU/GPU architectures.
5. Create battery and thermal throttling audit criteria during continuous numerical stress benchmarks.
6. Formulate binary size, dynamic library linking, and bitcode/symbols strip checks required by {{target_platform}}.
7. Detail offline recovery checkpoints verifying computational state restoration after sudden OS process termination.

Constraints

• Checklist items MUST include specific threshold metrics where applicable.
• The checklist MUST NOT recommend disabling OS safety watchdogs or circumventing platform sandboxes.
• Checkpoints must explicitly separate foreground computation checks from background task checks.
• Format every item with a clear verification method (e.g., Instruments trace, unit test, log review).

Output format

Provide the release gate checklist organized into these sequential phases:

• Phase 1: Native Solver Binary Integrity and Signing Checklist (3-5 items)
• Phase 2: Memory Budget and Watchdog Compliance Checklist (4-6 items)
• Phase 3: Background Task Model and OS Quota Checklist (3-5 items)
• Phase 4: Numerical Precision and Thermal Stability Checklist (3-5 items)

Self-review

• Ensure memory benchmarks reflect the specified {{memory_threshold_mb}} MB limit.
• Verify all native solver libraries listed in {{third_party_solvers}} are accounted for.
• Check that each item specifies an actionable verification tool or test procedure.